Author Archives: nurblogi

Automatic Analog Layout Generation

Design Environment: Mentor Graphics Language: Perl OS: Unix An algorithm is developed for designing an automatic Op-amp layout generation by using scripting language. The layout of the two-stage Op-amp will automatically draw out in the Mentor Graphics IC station by … Continue reading

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Transistor Sizing Methodology for Low Noise Charge Sensitive Amplifier With Input Transistor Working in Moderate Inversion

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Good learning resources

1. Free lectures from top university professors http://www.coursera.com 2. Free video lectures http://www.freevideolectures.com 3. CMOS learning, by R. Jacob Baker http://www.cmosedu.com

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http://www.uoguelph.ca/~sgregori/links.html All about electronics information, resources, and companies

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IC Production Service

1. The MOSIS Service: http://www.mosis.com   2. TSMC (Taiwan Semiconductor Manufacturing Company) : http://www.tsmc.com/english/default.htm

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BSIM3 and BSIM4 MOSFET Models (Levels 47, 53, and 60)

Model type: nmos or pmos These models are used in IC design. The set of instance parameters is the same as in level 1 MOSFETs. 3.6.23.1 BSIM3v2 (Level 47) MOSFET Model Syntax: M name (nodeDnodeGnodeSnodeB) model_name + param[=value]… BSIM3v2 models … Continue reading

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Level 6 MOSFET Model

The level 6 model is a simplified MOSFET model developed at UC Berkeley. All level 1 model parameters are supported except kp, n, wd, xl, xw, delvto, bex, kf, and af. Some additional model parameters are also supported. See Table … Continue reading

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